IEEE Seattle SSCS and CASS Chapter Event – Presentation: High Power Density, Fully Integrated Voltage Regulators for High Performance Digital Core Supply Management –

Abstract:

Power management integrated circuits (PMIC) play an important role in almost all electronic systems such as smartphones, tablets, computers, electric vehicles, etc. On-chip loads such as microprocessors cores, memories, and analog/RF blocks require multiple supply voltage domains. Providing these supply voltages from on-chip voltage regulators increases the overall system cost and limits the performance due to the board and package parasitics. Therefore, an on-chip fully integrated voltage regulator (FIVR) is a critical need for high performance digital cores. Modern multicore microprocessors are utilized for real-time computing, coding, modulation, and multimedia processing. consumption demand from on-chip load such as hardware accelerators, and GPU, etc. is also continuing to increase. By adaptively varying both the voltage and frequency with respect to the changing load conditions, the overall power consumption of these processors can be greatly reduced. Also, the voltage needs to adjust at a faster rate to achieve the full advantage of dynamic voltage and frequency scaling (DVFS). These multi-core processors require multiple voltage domains to operate with dynamic voltage scaling.

In this presentation a topology for a fully integrated power stage in a DC-DC buck converter achieving a high-power density and a time-domain hysteresis based highly integrated buck converter will be introduced. A multi-phase time-domain comparator is proposed in this work for implementing the hysteresis control, thereby achieving a process scaling friendly highly digital design. A higher- order LC notch filter which couples the input and output voltage ripple is developed. The power stage operates at 500 MHz and can deliver a maximum power of 1.0 W and load current of 1.67 A, while occupying 1.21 mm2 active die area, achieving a power density of 0.867 W/mm2 and current density of 1.377 A/mm2. Efficiency obtained is 71% at 780 mA of load current.

Speaker(s): Bertan Bakkaloglu,

Location:
Room: Room 105
Bldg: Electrical and Computer Engineering Building
185 Stevens Way NE
Seattle, Washington
98195